A 50 nm gate length InN tri-gate FET design with gm of 1.07 mS/μm and ft of 495 GHz

Krishnendu Ghosh; Uttam Singisetti

doi:10.1109/DRC.2013.6633803

A 50 nm gate length InN tri-gate FET design with g_m of 1.07 mS/μm and f_t of 495 GHz

Krishnendu Ghosh
, Uttam Singisetti

Department of Electrical Engineering

University at Buffalo

SUNY Buffalo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Original language	English
Title of host publication	71st Device Research Conference, DRC 2013 - Conference Digest
Pages	81-82
Number of pages	2
DOIs	https://doi.org/10.1109/DRC.2013.6633803
State	Published - 2013
Event	71st Device Research Conference, DRC 2013 - Notre Dame, IN, United States Duration: Jun 23 2013 → Jun 26 2013

Publication series

Name	Device Research Conference - Conference Digest, DRC

Conference

Conference	71st Device Research Conference, DRC 2013
Country/Territory	United States
City	Notre Dame, IN
Period	06/23/13 → 06/26/13

Access to Document

10.1109/DRC.2013.6633803

Cite this

@inproceedings{d9e2b998e08b4ac6917f3ac81b1ef61c,

title = "A 50 nm gate length InN tri-gate FET design with gm of 1.07 mS/μm and ft of 495 GHz",

author = "Krishnendu Ghosh and Uttam Singisetti",

year = "2013",

doi = "10.1109/DRC.2013.6633803",

language = "English",

isbn = "9781479908110",

series = "Device Research Conference - Conference Digest, DRC",

pages = "81--82",

booktitle = "71st Device Research Conference, DRC 2013 - Conference Digest",

note = "71st Device Research Conference, DRC 2013 ; Conference date: 23-06-2013 Through 26-06-2013",

}

Ghosh, K & Singisetti, U 2013, A 50 nm gate length InN tri-gate FET design with g_m of 1.07 mS/μm and f_t of 495 GHz. in 71st Device Research Conference, DRC 2013 - Conference Digest., 6633803, Device Research Conference - Conference Digest, DRC, pp. 81-82, 71st Device Research Conference, DRC 2013, Notre Dame, IN, United States, 06/23/13. https://doi.org/10.1109/DRC.2013.6633803

A 50 nm gate length InN tri-gate FET design with g_m of 1.07 mS/μm and f_t of 495 GHz. / Ghosh, Krishnendu; Singisetti, Uttam.
71st Device Research Conference, DRC 2013 - Conference Digest. 2013. p. 81-82 6633803 (Device Research Conference - Conference Digest, DRC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 50 nm gate length InN tri-gate FET design with gm of 1.07 mS/μm and ft of 495 GHz

AU - Ghosh, Krishnendu

AU - Singisetti, Uttam

PY - 2013

Y1 - 2013

UR - https://www.scopus.com/pages/publications/84890048529

U2 - 10.1109/DRC.2013.6633803

DO - 10.1109/DRC.2013.6633803

M3 - Conference contribution

SN - 9781479908110

T3 - Device Research Conference - Conference Digest, DRC

SP - 81

EP - 82

BT - 71st Device Research Conference, DRC 2013 - Conference Digest

T2 - 71st Device Research Conference, DRC 2013

Y2 - 23 June 2013 through 26 June 2013

ER -

A 50 nm gate length InN tri-gate FET design with g_m of 1.07 mS/μm and f_t of 495 GHz

Publication series

Conference

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