TY - GEN
T1 - A discrete time controller for a single stage three level resonant PFC converter operated with variable frequency phase shift modulation
AU - Agamy, Mohammed S.
AU - Jain, Praveen K.
PY - 2007
Y1 - 2007
N2 - This paper presents a discrete time cycle by cycle controller for a three level resonant single stage power factor correction converter. The controller is supposed to generate variable frequency phase shift modulated (VFPSM) gate signals to the switches. The merits of such control method is to tightly regulate the output voltage, shape the input ac current as well as regulating the dc bus voltage to a specified value throughout the operation range of the converter. The output voltage control loop determines the required switching frequency for the resonant converter to regulate the output voltage, whereas the pulse width is determined by the dc-bus voltage control loop. The sampling period for the controller is determined by the switching frequency obtained from the output voltage control loop. This converter provides high efficiency, reduced voltage stresses, universal input voltage capability, input/output isolation, simplicity of controller implementation and most importantly increased power density. The proposed method is verified through a 2.3kW, 48V three level, single stage LCC converter with input voltage varying from 90-265Vrms
AB - This paper presents a discrete time cycle by cycle controller for a three level resonant single stage power factor correction converter. The controller is supposed to generate variable frequency phase shift modulated (VFPSM) gate signals to the switches. The merits of such control method is to tightly regulate the output voltage, shape the input ac current as well as regulating the dc bus voltage to a specified value throughout the operation range of the converter. The output voltage control loop determines the required switching frequency for the resonant converter to regulate the output voltage, whereas the pulse width is determined by the dc-bus voltage control loop. The sampling period for the controller is determined by the switching frequency obtained from the output voltage control loop. This converter provides high efficiency, reduced voltage stresses, universal input voltage capability, input/output isolation, simplicity of controller implementation and most importantly increased power density. The proposed method is verified through a 2.3kW, 48V three level, single stage LCC converter with input voltage varying from 90-265Vrms
UR - https://www.scopus.com/pages/publications/47849129984
U2 - 10.1109/INTLEC.2007.4448775
DO - 10.1109/INTLEC.2007.4448775
M3 - Conference contribution
SN - 9781424416288
T3 - INTELEC, International Telecommunications Energy Conference (Proceedings)
SP - 242
EP - 247
BT - International Telecommunication Energy Conference, INTELEC 2007
T2 - International Telecommunication Energy Conference, INTELEC 2007
Y2 - 30 September 2007 through 4 October 2007
ER -