A flexible resampling mechanism for parallel particle filters

Sangjin Hong; Shu Shin Chin; Sadasivam Magesh

doi:10.1109/VTSA.2003.1252610

A flexible resampling mechanism for parallel particle filters

Sangjin Hong
, Shu Shin Chin
, Sadasivam Magesh

Electrical Engineering

Stony Brook University

Stony Brook University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This paper presents an efficient flexible resampling architecture For parallel particle filtering. The architecture incorporates distributed, delayed resampling mechanisms for fast resampling processing. The architecture consists up to four resampling units and 16 processing elements. Their interconnection can be dynamically reconfigured. The architecture is designed and evaluated for bearing tracking example. The architecture is designed for 0.25 μm CMOS technology.

Original language	English
Title of host publication	VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	288-291
Number of pages	4
ISBN (Electronic)	0780377656
DOIs	https://doi.org/10.1109/VTSA.2003.1252610
State	Published - 2003
Event	20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003 - Hsinchu, Taiwan, Province of China Duration: Oct 6 2003 → Oct 8 2003

Publication series

Name	International Symposium on VLSI Technology, Systems, and Applications, Proceedings
Volume	2003-January

Conference

Conference	20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	10/6/03 → 10/8/03

Access to Document

10.1109/VTSA.2003.1252610

Cite this

Hong, S., Chin, S. S., & Magesh, S. (2003). A flexible resampling mechanism for parallel particle filters. In VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings (pp. 288-291). Article 1252610 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VTSA.2003.1252610

Hong, Sangjin ; Chin, Shu Shin ; Magesh, Sadasivam. / A flexible resampling mechanism for parallel particle filters. VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 288-291 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

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title = "A flexible resampling mechanism for parallel particle filters",

abstract = "This paper presents an efficient flexible resampling architecture For parallel particle filtering. The architecture incorporates distributed, delayed resampling mechanisms for fast resampling processing. The architecture consists up to four resampling units and 16 processing elements. Their interconnection can be dynamically reconfigured. The architecture is designed and evaluated for bearing tracking example. The architecture is designed for 0.25 μm CMOS technology.",

author = "Sangjin Hong and Chin, \{Shu Shin\} and Sadasivam Magesh",

note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; 20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003 ; Conference date: 06-10-2003 Through 08-10-2003",

year = "2003",

doi = "10.1109/VTSA.2003.1252610",

language = "English",

series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Hong, S, Chin, SS & Magesh, S 2003, A flexible resampling mechanism for parallel particle filters. in VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings., 1252610, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, vol. 2003-January, Institute of Electrical and Electronics Engineers Inc., pp. 288-291, 20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003, Hsinchu, Taiwan, Province of China, 10/6/03. https://doi.org/10.1109/VTSA.2003.1252610

A flexible resampling mechanism for parallel particle filters. / Hong, Sangjin; Chin, Shu Shin; Magesh, Sadasivam.
VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2003. p. 288-291 1252610 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings; Vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chin, Shu Shin

AU - Magesh, Sadasivam

PY - 2003

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N2 - This paper presents an efficient flexible resampling architecture For parallel particle filtering. The architecture incorporates distributed, delayed resampling mechanisms for fast resampling processing. The architecture consists up to four resampling units and 16 processing elements. Their interconnection can be dynamically reconfigured. The architecture is designed and evaluated for bearing tracking example. The architecture is designed for 0.25 μm CMOS technology.

AB - This paper presents an efficient flexible resampling architecture For parallel particle filtering. The architecture incorporates distributed, delayed resampling mechanisms for fast resampling processing. The architecture consists up to four resampling units and 16 processing elements. Their interconnection can be dynamically reconfigured. The architecture is designed and evaluated for bearing tracking example. The architecture is designed for 0.25 μm CMOS technology.

UR - https://www.scopus.com/pages/publications/79960396501

U2 - 10.1109/VTSA.2003.1252610

DO - 10.1109/VTSA.2003.1252610

M3 - Conference contribution

T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings

SP - 288

EP - 291

BT - VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003

Y2 - 6 October 2003 through 8 October 2003

ER -

Hong S, Chin SS, Magesh S. A flexible resampling mechanism for parallel particle filters. In VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2003. p. 288-291. 1252610. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). doi: 10.1109/VTSA.2003.1252610

A flexible resampling mechanism for parallel particle filters

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