TY - GEN
T1 - A practical hafnium-oxide memristor model suitable for circuit design and simulation
AU - Amer, Sherif
AU - Sayyaparaju, Sagarvarma
AU - Rose, Garrett S.
AU - Beckmann, Karsten
AU - Cady, Nathaniel C.
N1 - Publisher Copyright: © 2017 IEEE.
PY - 2017/9/25
Y1 - 2017/9/25
N2 - This paper proposes a practical polynomial model for HfO2 memristor fabricated in-house at SUNY Polytechnic Institute. Although there is no shortage of memristor models in the literature, most models are not general and assume specific switching and conduction mechanisms. This is often deemed impractical for circuit designers who wish to develop a model for a specific technology of interest. Thus, circuit designers have sought empirical models that are easily fit to their specific device. The model should be simple, intuitive, and most importantly, fast to converge. The proposed model is based on measurable parameters and matches the experimental data well. The convergence of our model is tested against other models in the literature and shows comparable results. It is also shown that the smoothness of the model around the memristor threshold is critical for fast convergence time.
AB - This paper proposes a practical polynomial model for HfO2 memristor fabricated in-house at SUNY Polytechnic Institute. Although there is no shortage of memristor models in the literature, most models are not general and assume specific switching and conduction mechanisms. This is often deemed impractical for circuit designers who wish to develop a model for a specific technology of interest. Thus, circuit designers have sought empirical models that are easily fit to their specific device. The model should be simple, intuitive, and most importantly, fast to converge. The proposed model is based on measurable parameters and matches the experimental data well. The convergence of our model is tested against other models in the literature and shows comparable results. It is also shown that the smoothness of the model around the memristor threshold is critical for fast convergence time.
UR - https://www.scopus.com/pages/publications/85032662135
U2 - 10.1109/ISCAS.2017.8050790
DO - 10.1109/ISCAS.2017.8050790
M3 - Conference contribution
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - IEEE International Symposium on Circuits and Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Y2 - 28 May 2017 through 31 May 2017
ER -