TY - GEN
T1 - Active silicon components for chip to chip interconnects
AU - Castracane, James
AU - Tokranova, Natalya
AU - Song, Da
PY - 2007
Y1 - 2007
N2 - Among the major challenges confronting the current initiatives to incorporate optical interconnect capabilities for chip to chip I/O is to define, develop and implement the necessary components required for a complete pipeline from source to receiver. For next generation integrated circuits, the need for multi-functionality and multi-dimensional integration has resulted in new demands on interface technology to yield massively parallel data and clock lines. At this point, such methods are primarily limited to static reflectors, filters and gratings for interface and optical routing. One of the crucial elements is to develop a high performance and flexible optical network to transform an incoming optical pulse train into a widely distributed set of optical signals whose direction, alignment and power can be independently controlled. This coupling can be achieved using several methods including active (primarily, MEMS-based) beam steering arrays. For chip to chip applications, the overwhelming majority of the recent research and development effort has been focused on source and detector technologies, but less attention has been devoted to flexible, reconfigurable beam steering modalities. A variety of approaches for such beam steering and distribution of both timing and data lines has been examined. This paper will present an overview of active, silicon components under development at the College of Nanoscale Science and Engineering for array-based I/O management with an emphasis on reconfigurable diffractive devices and adjustable, porous silicon-based components which combine optical beam steering, filtering and focusing capabilities. Design details along with initial performance data from prototype components will be presented.
AB - Among the major challenges confronting the current initiatives to incorporate optical interconnect capabilities for chip to chip I/O is to define, develop and implement the necessary components required for a complete pipeline from source to receiver. For next generation integrated circuits, the need for multi-functionality and multi-dimensional integration has resulted in new demands on interface technology to yield massively parallel data and clock lines. At this point, such methods are primarily limited to static reflectors, filters and gratings for interface and optical routing. One of the crucial elements is to develop a high performance and flexible optical network to transform an incoming optical pulse train into a widely distributed set of optical signals whose direction, alignment and power can be independently controlled. This coupling can be achieved using several methods including active (primarily, MEMS-based) beam steering arrays. For chip to chip applications, the overwhelming majority of the recent research and development effort has been focused on source and detector technologies, but less attention has been devoted to flexible, reconfigurable beam steering modalities. A variety of approaches for such beam steering and distribution of both timing and data lines has been examined. This paper will present an overview of active, silicon components under development at the College of Nanoscale Science and Engineering for array-based I/O management with an emphasis on reconfigurable diffractive devices and adjustable, porous silicon-based components which combine optical beam steering, filtering and focusing capabilities. Design details along with initial performance data from prototype components will be presented.
KW - MOEMS
KW - Optical interconnect
KW - Porous silicon
KW - WDM
UR - https://www.scopus.com/pages/publications/34248635419
U2 - 10.1117/12.699136
DO - 10.1117/12.699136
M3 - Conference contribution
SN - 0819465909
SN - 9780819465900
T3 - Proceedings of SPIE - The International Society for Optical Engineering
BT - Silicon Photonics II
T2 - Silicon Photonics II
Y2 - 22 January 2007 through 24 January 2007
ER -