TY - GEN
T1 - Assessment of PCB pad cratering resistance by joint level testing
AU - Roggeman, Brian
AU - Borgesen, Peter
AU - Li, Jing
AU - Godbole, Guarav
AU - Tumne, Pushkraj
AU - Srihari, K.
AU - Levo, Tim
AU - Pitarresi, James
PY - 2008
Y1 - 2008
N2 - Cracking of the laminate under the solder connect pads, known as pad craters, is a reliability issue related to mechanical stresses generated from either mechanical or thermal loading. The current study aims to establish a mechanistic understanding of pad cratering through the use of joint-level testing techniques. Both strength and cyclic loading lifetime are considered, and the results indicate that these two loading modes are not correlated. The individual crack paths within a crater are found to differ with laminate material, glass style (if any), and micro-via details. Various degradation mechanisms are found to have a significant effect on mis failure mode with both mermal and moisture exposure showing decreased laminate performance. Finally, the relationship between joint-level testing is compared to the performance in board level drop test. Here we see mat joint-level testing is far more general, in terms of qualifying the robustness of the laminate.
AB - Cracking of the laminate under the solder connect pads, known as pad craters, is a reliability issue related to mechanical stresses generated from either mechanical or thermal loading. The current study aims to establish a mechanistic understanding of pad cratering through the use of joint-level testing techniques. Both strength and cyclic loading lifetime are considered, and the results indicate that these two loading modes are not correlated. The individual crack paths within a crater are found to differ with laminate material, glass style (if any), and micro-via details. Various degradation mechanisms are found to have a significant effect on mis failure mode with both mermal and moisture exposure showing decreased laminate performance. Finally, the relationship between joint-level testing is compared to the performance in board level drop test. Here we see mat joint-level testing is far more general, in terms of qualifying the robustness of the laminate.
UR - https://www.scopus.com/pages/publications/51349158472
U2 - 10.1109/ECTC.2008.4550081
DO - 10.1109/ECTC.2008.4550081
M3 - Conference contribution
SN - 9781424422302
T3 - Proceedings - Electronic Components and Technology Conference
SP - 884
EP - 892
BT - 2008 Proceedings 58th Electronic Components and Technology Conference, ECTC
T2 - 2008 58th Electronic Components and Technology Conference, ECTC
Y2 - 27 May 2008 through 30 May 2008
ER -