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Development of 13 bit digitally controlled oscillator using fibonacci sequence in 0.18 um CMOS process

  • M. Ishihara
  • , R. K. Pokharel
  • , A. Tomar
  • , D. Kanemoto
  • , H. Kanaya
  • , K. Yoshida

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a digitally controlled oscillator (DCO) in Inductor-Capacitor (LC) topology with an enhanced frequency-steps and power consumption. Using special Fibonacci sequence method for optimizing capacitor sizes, this digitally-controlled oscillator (DCO) realizes frequency-tuning steps superior than a conventional DCO using binary sequence without increasing the power consumption. The proposed circuit is implemented in 0.18 um CMOS technology and tested. It has a center frequency of 7.9 GHz. The measured phase noise is 117.1 dBc/Hz(@1MHz offset) at carrier frequency of 7.7 GHz.

Original languageEnglish
Title of host publicationAsia-Pacific Microwave Conference Proceedings, APMC 2011
Pages1634-1637
Number of pages4
StatePublished - 2011
EventAsia-Pacific Microwave Conference, APMC 2011 - Melbourne, VIC, Australia
Duration: Dec 5 2011Dec 8 2011

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC

Conference

ConferenceAsia-Pacific Microwave Conference, APMC 2011
Country/TerritoryAustralia
CityMelbourne, VIC
Period12/5/1112/8/11

Keywords

  • Fibonacci sequence
  • digitally controlled oscillator
  • frequency tuning step
  • phase noise

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