Device characteristics of crystalline epitaxial oxides on silicon

There is an extensive effort in the transistor industry to develop an alternate high-K gate dielectric to replace SiO2 due to tunneling limits. We have investigated the potential of crystalline perovskite oxides (SrTiO3 or STO) grown epitaxially over Si as a gate dielectric. Transmission electron microscopy images show that these epitaxial STO films have an interfacial amorphous layer <10 angstrom that is mostly SiO2. Using tantalum nitride (TaN) as a gate electrode, capacitors and MOSFETs were fabricated. Films with an equivalent oxide thickness (EOT) of 9 angstrom were achieved from a 100 angstrom STO layer yielding a dielectric constant of approx. 160. Measurements on n- and p-channel MOSFETs show leakage currents at ±1V beyond inversion of 15 mA/ cm² and 25 mA cm² respectively. Drive currents of 245 and 20 μA/μm were realized for n- and p-channel devices. Calculated field mobilities were 221 cm²/V-sec for electrons and 62 cm²/V-s for holes. The use of a gate stack that has a high-K material (STO) over a low-K material (SiO2) may have some potential advantages over a single medium-K layer.