Effect of Resistance variability in Vector Matrix Multiplication operations of 1T1R ReRAM crossbar arrays using an Embedded test platform

Vector math operations are considered one of the basic operations for computationally intensive algorithms. The latest emerging resistive random access memory device (ReRAMI) and ReRAM crossbar arrays have shown convincing results for analog vector matrix multiplication with high energy efficiency and hence, are of great interest for computing applications because of their capability to perform array level in-memory computing in a single step. To perform fast and accurate vector math operations to a column of 1-transistor 1ReRAM (ITIR) devices in an array, a hardware interface that provides a precise control over programming the devices is needed. In this work, we demonstrate a microcontroller-based custom printed circuit board (PCB) design to perform device level testing and in-memory computation on packaged hafnium oxide based ITIR ReRAM arrays fabricated at SUNY Polytechnic Institute. Experimental results demonstrate that when ITIR ReR.AM array devices are programmed as logic states '0' high resistance state (HRS) and '1' low resistance state (LRS), the observed current (Isut) shows the effect of read variability based on the number and position of the devices that are read. Overlapping of the current outputs can be reduced by using write-verify while programming the array of devices.