Electrical properties of GaAs homojunctions grown by MOCVD on GaAs and Si substrates

Several techniques, including DLTS, I-V-T, C-V-T, C-T and photoreflectance spectroscopy were used to investigate the electrical properties of GaAs multilayer heteroface p-n junctions epitaxially grown by MOCVD on GaAs or Si substrates in order to study the influence of heteroepitaxy on device properties. A deep level (EL2) was detected for both GaAs/GaAs and GaAs/Si structures. For GaAs/Si, a continuous distribution of trap levels was also observed which could be ascribed to misfit defects. I-V-T data revealed the saturation current of GaAs/Si diodes to be four orders in amplitude higher than for GaAs/GaAs ones. Different temperature dependences were found in saturation current density, barrier height and capacitance between the two structures. A multistep tunneling model is utilized in explaining the results for GaAs/Si. C-T measurements indicated that the free carriers are not frozen-out for GaAs/Si at the observed freeze-out temperature of GaAs/GaAs. Defect-induced bandgap tailing might be responsible for this effect.