Extrinsic and intrinsic charge trapping at the graphene/ferroelectric interface

M. Humed Yusuf; Bent Nielsen; M. Dawber; X. Du

doi:10.1021/nl502669v

Extrinsic and intrinsic charge trapping at the graphene/ferroelectric interface

M. Humed Yusuf
, Bent Nielsen
, M. Dawber
, X. Du

Physics and Astronomy

Stony Brook University

Stony Brook University

Research output: Contribution to journal › Article › peer-review

89 Scopus citations

Abstract

The interface between graphene and the ferroelectric superlattice PbTiO₃/SrTiO₃ (PTO/STO) is studied. Tuning the transition temperature through the PTO/STO volume fraction minimizes the adorbates at the graphene/ferroelectric interface, allowing robust ferroelectric hysteresis to be demonstrated. "Intrinsic" charge traps from the ferroelectric surface defects can adversely affect the graphene channel hysteresis and can be controlled by careful sample processing, enabling systematic study of the charge trapping mechanism.

Original language	English
Pages (from-to)	5437-5444
Number of pages	8
Journal	Nano Letters
Volume	14
Issue number	9
DOIs	https://doi.org/10.1021/nl502669v
State	Published - Sep 10 2014

Keywords

Graphene
charge trapping
ferroelectric superlattice
ferroelectricity
hysteresis
interface

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10.1021/nl502669v

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abstract = "The interface between graphene and the ferroelectric superlattice PbTiO3/SrTiO3 (PTO/STO) is studied. Tuning the transition temperature through the PTO/STO volume fraction minimizes the adorbates at the graphene/ferroelectric interface, allowing robust ferroelectric hysteresis to be demonstrated. {"}Intrinsic{"} charge traps from the ferroelectric surface defects can adversely affect the graphene channel hysteresis and can be controlled by careful sample processing, enabling systematic study of the charge trapping mechanism.",

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AU - Yusuf, M. Humed

AU - Nielsen, Bent

AU - Dawber, M.

AU - Du, X.

PY - 2014/9/10

Y1 - 2014/9/10

N2 - The interface between graphene and the ferroelectric superlattice PbTiO3/SrTiO3 (PTO/STO) is studied. Tuning the transition temperature through the PTO/STO volume fraction minimizes the adorbates at the graphene/ferroelectric interface, allowing robust ferroelectric hysteresis to be demonstrated. "Intrinsic" charge traps from the ferroelectric surface defects can adversely affect the graphene channel hysteresis and can be controlled by careful sample processing, enabling systematic study of the charge trapping mechanism.

AB - The interface between graphene and the ferroelectric superlattice PbTiO3/SrTiO3 (PTO/STO) is studied. Tuning the transition temperature through the PTO/STO volume fraction minimizes the adorbates at the graphene/ferroelectric interface, allowing robust ferroelectric hysteresis to be demonstrated. "Intrinsic" charge traps from the ferroelectric surface defects can adversely affect the graphene channel hysteresis and can be controlled by careful sample processing, enabling systematic study of the charge trapping mechanism.

KW - Graphene

KW - charge trapping

KW - ferroelectric superlattice

KW - ferroelectricity

KW - hysteresis

KW - interface

UR - https://www.scopus.com/pages/publications/84914162399

U2 - 10.1021/nl502669v

DO - 10.1021/nl502669v

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VL - 14

SP - 5437

EP - 5444

JO - Nano Letters

JF - Nano Letters

IS - 9

ER -

Extrinsic and intrinsic charge trapping at the graphene/ferroelectric interface

Abstract

Keywords

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