Ferroelectric nonvolatile memory technology: Applications and integration challenges

Peter Zurcher; Robert E. Jones; Peir Y. Chu; Deborah J. Taylor; Bruce E. White; Sufi Zafar; Bo Jiang; Yeong Jyh Tom Lii; Sherry J. Gillespie

doi:10.1109/95.588571

Ferroelectric nonvolatile memory technology: Applications and integration challenges

Peter Zurcher
, Robert E. Jones
, Peir Y. Chu
, Deborah J. Taylor
, Bruce E. White
, Sufi Zafar
, Bo Jiang
, Yeong Jyh Tom Lii
, Sherry J. Gillespie

Physics

Binghamton University

Motorola
IEEE

Research output: Contribution to journal › Article › peer-review

24 Scopus citations

Abstract

Challenges in the integration of ferroelectric nonvolatile memories with complementary metal-oxide-semiconductor (CMOS) technology for low-voltage and low-power applications are discussed. The main driving force for commercialization is to take advantage of the true high-speed (100 ns), low-voltage (0.9 V) write potential of ferroelectric memories. The operation of ferroelectric nonvolatile memories and different integration approaches are discussed. Specifically, our effort in integrating SrBi₂Ta₂O₉ ferroelectrics with CMOS are reviewed. For the first time, ferroelectric capacitor and CMOS transistor properties after integration through metallization are presented.

Original language	English
Pages (from-to)	175-180
Number of pages	6
Journal	IEEE Transactions on Components Packaging and Manufacturing Technology Part A
Volume	20
Issue number	2
DOIs	https://doi.org/10.1109/95.588571
State	Published - Jun 1997

Keywords

CMOS integration
Ferroelectric capacitor
Non-volatile memory
SrBiTaO
Thin films

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10.1109/95.588571

Cite this

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title = "Ferroelectric nonvolatile memory technology: Applications and integration challenges",

abstract = "Challenges in the integration of ferroelectric nonvolatile memories with complementary metal-oxide-semiconductor (CMOS) technology for low-voltage and low-power applications are discussed. The main driving force for commercialization is to take advantage of the true high-speed (100 ns), low-voltage (0.9 V) write potential of ferroelectric memories. The operation of ferroelectric nonvolatile memories and different integration approaches are discussed. Specifically, our effort in integrating SrBi2Ta2O9 ferroelectrics with CMOS are reviewed. For the first time, ferroelectric capacitor and CMOS transistor properties after integration through metallization are presented.",

keywords = "CMOS integration, Ferroelectric capacitor, Non-volatile memory, SrBiTaO, Thin films",

author = "Peter Zurcher and Jones, \{Robert E.\} and Chu, \{Peir Y.\} and Taylor, \{Deborah J.\} and White, \{Bruce E.\} and Sufi Zafar and Bo Jiang and Lii, \{Yeong Jyh Tom\} and Gillespie, \{Sherry J.\}",

year = "1997",

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AU - Zurcher, Peter

AU - Jones, Robert E.

AU - Chu, Peir Y.

AU - Taylor, Deborah J.

AU - White, Bruce E.

AU - Zafar, Sufi

AU - Jiang, Bo

AU - Lii, Yeong Jyh Tom

AU - Gillespie, Sherry J.

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AB - Challenges in the integration of ferroelectric nonvolatile memories with complementary metal-oxide-semiconductor (CMOS) technology for low-voltage and low-power applications are discussed. The main driving force for commercialization is to take advantage of the true high-speed (100 ns), low-voltage (0.9 V) write potential of ferroelectric memories. The operation of ferroelectric nonvolatile memories and different integration approaches are discussed. Specifically, our effort in integrating SrBi2Ta2O9 ferroelectrics with CMOS are reviewed. For the first time, ferroelectric capacitor and CMOS transistor properties after integration through metallization are presented.

KW - CMOS integration

KW - Ferroelectric capacitor

KW - Non-volatile memory

KW - SrBiTaO

KW - Thin films

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ER -

Ferroelectric nonvolatile memory technology: Applications and integration challenges

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Keywords

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