Skip to main navigation Skip to search Skip to main content

Finite-length synthesis filters for non-uniformly time-interleaved analog-to-digital converter

Research output: Contribution to journalConference articlepeer-review

15 Scopus citations

Abstract

A fundamental problem with an actual implementation of a time-interleaved analog-to-digital converter (ADC) is the sample-time mismatches among the demultiplexing channels. This problem is expected to worsen with continued scaling of transistor sizes and the need for faster ADC's. Based on the filter bank framework, an approach for designing a finite-length synthesis filter that interpolates in the least-squares sense to obtain uniform samples is presented. Our results suggest that although digital interpolation can be very effective in improving the ADC resolution, achieving arbitrarily high resolution may require synthesis filters that are very complex.

Original languageEnglish
Pages (from-to)IV/815-IV/818
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
StatePublished - 2002
Event2002 IEEE International Symposium on Circuits and Systems - Phoenix, AZ, United States
Duration: May 26 2002May 29 2002

Fingerprint

Dive into the research topics of 'Finite-length synthesis filters for non-uniformly time-interleaved analog-to-digital converter'. Together they form a unique fingerprint.

Cite this