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Flow-based computing on nanoscale crossbars: Design and implementation of full adders

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

29 Scopus citations

Abstract

We present the design and implementation of a full adder circuit that exploits the natural flow of current through nanowires and More-than-Moore nano-devices in two dimensional crossbars. We evaluate the speed and energy efficiency of our design and compare it to equivalent one-bit adder designs using CMOS and nanoscale memristors. Our memristive full adder circuit has been shown to be an order of magnitude faster and more energy-efficient than equivalent CMOS designs. Our circuit is an order of magnitude more compact that equivalent CMOS designs. We also argue that our design occupies less area and is faster than competing memristor designs.

Original languageEnglish
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1870-1873
Number of pages4
ISBN (Electronic)9781479953400
DOIs
StatePublished - Jul 29 2016
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: May 22 2016May 25 2016

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2016-July

Conference

Conference2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
Country/TerritoryCanada
CityMontreal
Period05/22/1605/25/16

Keywords

  • Adders
  • Crossbars
  • Digital Computing
  • Memristor
  • Nanoscale Devices
  • Nanowires
  • Sneak Paths

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