Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation

Nevin A. Jacob; Diego James; Bibhu Datta Sahoo

doi:10.1109/MWSCAS.2016.7870039

Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation

Nevin A. Jacob
, Diego James
, Bibhu Datta Sahoo

Department of Electrical Engineering

University at Buffalo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

Decision feedback equalizer (DFE) is commonly used in the receiver to cancel out the inter-symbol interference (ISI). However, the capacitive loading at the analog summing node increases with addition of each post-cursor cancellation tap, which directly impacts the bandwidth. In this paper, we propose a multi-Tap switched-capacitor (SC) topology which can cancel out multiple post-cursor content with reduced loading at the analog summing node. Simulation has been implemented in UMC65-nm SP technology for a 4-Tap system, using a triple cascaded B12" channel, having attenuation of 19 dB at nyquist frequency of 2 GHz. Improvements in eye height up to 84% is observed for the eye diagram at the summing node with 4-Tap cancellation compared to 1-Tap cancellation.

Original language	English
Title of host publication	2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509009169
DOIs	https://doi.org/10.1109/MWSCAS.2016.7870039
State	Published - Jul 2 2016
Event	59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016 - Abu Dhabi, United Arab Emirates Duration: Oct 16 2016 → Oct 19 2016

Publication series

Name	Midwest Symposium on Circuits and Systems
Volume	0

Conference

Conference	59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Country/Territory	United Arab Emirates
City	Abu Dhabi
Period	10/16/16 → 10/19/16

Keywords

Decision feedback equalizer (DFE)
Eye diagram
Inter symbol interference (ISI)
Switched capacitor DFE

Access to Document

10.1109/MWSCAS.2016.7870039

Cite this

Jacob, N. A., James, D., & Sahoo, B. D. (2016). Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation. In 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016 Article 7870039 (Midwest Symposium on Circuits and Systems; Vol. 0). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MWSCAS.2016.7870039

@inproceedings{d872658324a74d4494edc7b4a380f35f,

title = "Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation",

abstract = "Decision feedback equalizer (DFE) is commonly used in the receiver to cancel out the inter-symbol interference (ISI). However, the capacitive loading at the analog summing node increases with addition of each post-cursor cancellation tap, which directly impacts the bandwidth. In this paper, we propose a multi-Tap switched-capacitor (SC) topology which can cancel out multiple post-cursor content with reduced loading at the analog summing node. Simulation has been implemented in UMC65-nm SP technology for a 4-Tap system, using a triple cascaded B12{"} channel, having attenuation of 19 dB at nyquist frequency of 2 GHz. Improvements in eye height up to 84\% is observed for the eye diagram at the summing node with 4-Tap cancellation compared to 1-Tap cancellation.",

keywords = "Decision feedback equalizer (DFE), Eye diagram, Inter symbol interference (ISI), Switched capacitor DFE",

author = "Jacob, \{Nevin A.\} and Diego James and Sahoo, \{Bibhu Datta\}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016 ; Conference date: 16-10-2016 Through 19-10-2016",

year = "2016",

month = jul,

day = "2",

doi = "10.1109/MWSCAS.2016.7870039",

language = "English",

series = "Midwest Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016",

address = "United States",

}

Jacob, NA, James, D & Sahoo, BD 2016, Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation. in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016., 7870039, Midwest Symposium on Circuits and Systems, vol. 0, Institute of Electrical and Electronics Engineers Inc., 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016, Abu Dhabi, United Arab Emirates, 10/16/16. https://doi.org/10.1109/MWSCAS.2016.7870039

Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation. / Jacob, Nevin A.; James, Diego; Sahoo, Bibhu Datta.
2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7870039 (Midwest Symposium on Circuits and Systems; Vol. 0).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation

AU - Jacob, Nevin A.

AU - James, Diego

AU - Sahoo, Bibhu Datta

PY - 2016/7/2

Y1 - 2016/7/2

N2 - Decision feedback equalizer (DFE) is commonly used in the receiver to cancel out the inter-symbol interference (ISI). However, the capacitive loading at the analog summing node increases with addition of each post-cursor cancellation tap, which directly impacts the bandwidth. In this paper, we propose a multi-Tap switched-capacitor (SC) topology which can cancel out multiple post-cursor content with reduced loading at the analog summing node. Simulation has been implemented in UMC65-nm SP technology for a 4-Tap system, using a triple cascaded B12" channel, having attenuation of 19 dB at nyquist frequency of 2 GHz. Improvements in eye height up to 84% is observed for the eye diagram at the summing node with 4-Tap cancellation compared to 1-Tap cancellation.

AB - Decision feedback equalizer (DFE) is commonly used in the receiver to cancel out the inter-symbol interference (ISI). However, the capacitive loading at the analog summing node increases with addition of each post-cursor cancellation tap, which directly impacts the bandwidth. In this paper, we propose a multi-Tap switched-capacitor (SC) topology which can cancel out multiple post-cursor content with reduced loading at the analog summing node. Simulation has been implemented in UMC65-nm SP technology for a 4-Tap system, using a triple cascaded B12" channel, having attenuation of 19 dB at nyquist frequency of 2 GHz. Improvements in eye height up to 84% is observed for the eye diagram at the summing node with 4-Tap cancellation compared to 1-Tap cancellation.

KW - Decision feedback equalizer (DFE)

KW - Eye diagram

KW - Inter symbol interference (ISI)

KW - Switched capacitor DFE

UR - https://www.scopus.com/pages/publications/85015814037

U2 - 10.1109/MWSCAS.2016.7870039

DO - 10.1109/MWSCAS.2016.7870039

M3 - Conference contribution

T3 - Midwest Symposium on Circuits and Systems

BT - 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016

Y2 - 16 October 2016 through 19 October 2016

ER -

Full-rate switched capacitor multi-Tap DFE for long-Tail post-cursor cancellation

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this