Skip to main navigation Skip to search Skip to main content

Hardware Circuits and Systems Design for Post-Quantum Cryptography - A Tutorial Brief

  • Jiafeng Xie
  • , Wenfeng Zhao
  • , Hanho Lee
  • , Debapriya Basu Roy
  • , Xinmiao Zhang
  • Villanova University
  • Inha University
  • Indian Institute of Technology Kharagpur
  • Ohio State University

Research output: Contribution to journalArticlepeer-review

34 Scopus citations

Abstract

Due to the increasing threats from possible large-scale quantum computers, post-quantum cryptography (PQC) has drawn significant attention from various communities recently. In particular, along with the National Institute of Standards and Technology (NIST) PQC standardization process, more works have gradually switched to the PQC hardware implementations. Following this trend, this tutorial brief, led by a group of experts in the field, aims to deliver a comprehensive tutorial on hardware circuits and systems design for PQC. After introducing primary arithmetic operations and algorithmic features of different PQC, we introduced related PQC hardware circuits and systems design techniques (from component to system levels). Future research and directions are also provided. This tutorial will provide useful information for the TCAS-II community and the broader Circuits and Systems Society.

Original languageEnglish
Pages (from-to)1670-1676
Number of pages7
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume71
Issue number3
DOIs
StatePublished - Mar 1 2024

Keywords

  • Arithmetic operation
  • circuits and systems design techniques
  • hardware cryptographic design for PQC

Fingerprint

Dive into the research topics of 'Hardware Circuits and Systems Design for Post-Quantum Cryptography - A Tutorial Brief'. Together they form a unique fingerprint.

Cite this