Abstract
The paper presents two heuristics for hardware/software partitioning of system level specifications. The main objective is to achieve performance optimization with a limited hardware and software cost. We consider minimization of communication cost and improvement of the overall parallelism as essential criteria. One of the heuristics is based on simulated annealing and the other on tabu search. Experiments show the superiority of the tabu search based algorithm.
| Original language | English |
|---|---|
| Pages (from-to) | 71-76 |
| Number of pages | 6 |
| Journal | Proceedings of the International Symposium on System Synthesis |
| State | Published - 1996 |
| Event | Proceedings of the 1996 9th International Symposium on System Synthesis, ISSS'96 - La Jolla, CA, USA Duration: Nov 6 1996 → Nov 8 1996 |
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