Abstract
This work presents an on-chip 60 GHz lumped element transmission line (TL) using cascaded T-networks with a high Quality factor. Each T-network consists of a series inductance with a shunt capacitance at its center. We have derived the design equations for this TL configuration and proved that a TL whose electrical length ≥ 60° achieves additional miniaturization when implemented with three or more cascaded T-networks. The inductance is implemented using a straight wire model with no ground below it, while the capacitance is implemented using a parallel plate model with a grounding pedestal. Both configurations guarantee maximum inductance per unit length and capacitance per unit area to further improve the miniaturization level. A quarter wavelength TL with three cascaded T-networks is fabricated as proof of concept. The measured and simulated results of the fabricated TL have good agreement, and the measured quality factor is 17 at 60 GHz.
| Original language | English |
|---|---|
| Article number | 3748 |
| Journal | Electronics (Switzerland) |
| Volume | 13 |
| Issue number | 18 |
| DOIs | |
| State | Published - Sep 2024 |
Keywords
- CMOS
- integrated passive components
- lumped elements
- transmission lines
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