Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits

Jaya Dofe; Zhiming Zhang; Qiaoyan Yu; Chen Yan; Emre Salman

doi:10.1145/3060403.3060501

Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits

Jaya Dofe
, Zhiming Zhang
, Qiaoyan Yu
, Chen Yan
, Emre Salman

Electrical Engineering

Stony Brook University

University of New Hampshire
Stony Brook University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

Correlation power analysis (CPA) attacks on the hardware implementation of cryptographic algorithms can retrieve the cipher key by analyzing the correlation between hypothesized keys and the power measurement of that crypto hardware. The existing CPA attacks and the countermeasures are mainly for two-dimensional (4D) integrated circuits (ICs). There is a lack of study on CPA in the context of threedimensional (5D) ICs. To fill in this gap, this work investigates the impact of a 5D power distribution network (PDN) on the efficiency of CPA mounted on a cryptographic module, which is in one of the 5D planes. The Pearson correlation coefficient is used as a metric to assess the impact of different PDN types, circuit loads, and switching activities of the neighboring planes on the CPA efficiency.

Original language	English
Title of host publication	GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017
Publisher	Association for Computing Machinery
Pages	327-332
Number of pages	6
ISBN (Electronic)	9781450349727
DOIs	https://doi.org/10.1145/3060403.3060501
State	Published - May 10 2017
Event	27th Great Lakes Symposium on VLSI, GLSVLSI 2017 - Banff, Canada Duration: May 10 2017 → May 12 2017

Publication series

Name	Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Volume	Part F127756

Conference

Conference	27th Great Lakes Symposium on VLSI, GLSVLSI 2017
Country/Territory	Canada
City	Banff
Period	05/10/17 → 05/12/17

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10.1145/3060403.3060501

Cite this

Dofe, J., Zhang, Z., Yu, Q., Yan, C., & Salman, E. (2017). Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits. In GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017 (pp. 327-332). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI; Vol. Part F127756). Association for Computing Machinery. https://doi.org/10.1145/3060403.3060501

@inproceedings{7fbb40bd3d294180b69dc83ea3310913,

title = "Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits",

abstract = "Correlation power analysis (CPA) attacks on the hardware implementation of cryptographic algorithms can retrieve the cipher key by analyzing the correlation between hypothesized keys and the power measurement of that crypto hardware. The existing CPA attacks and the countermeasures are mainly for two-dimensional (4D) integrated circuits (ICs). There is a lack of study on CPA in the context of threedimensional (5D) ICs. To fill in this gap, this work investigates the impact of a 5D power distribution network (PDN) on the efficiency of CPA mounted on a cryptographic module, which is in one of the 5D planes. The Pearson correlation coefficient is used as a metric to assess the impact of different PDN types, circuit loads, and switching activities of the neighboring planes on the CPA efficiency.",

author = "Jaya Dofe and Zhiming Zhang and Qiaoyan Yu and Chen Yan and Emre Salman",

year = "2017",

month = may,

day = "10",

doi = "10.1145/3060403.3060501",

language = "English",

series = "Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI",

publisher = "Association for Computing Machinery",

pages = "327--332",

booktitle = "GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017",

note = "27th Great Lakes Symposium on VLSI, GLSVLSI 2017 ; Conference date: 10-05-2017 Through 12-05-2017",

}

Dofe, J, Zhang, Z, Yu, Q, Yan, C & Salman, E 2017, Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits. in GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, vol. Part F127756, Association for Computing Machinery, pp. 327-332, 27th Great Lakes Symposium on VLSI, GLSVLSI 2017, Banff, Canada, 05/10/17. https://doi.org/10.1145/3060403.3060501

Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits. / Dofe, Jaya; Zhang, Zhiming; Yu, Qiaoyan et al.
GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017. Association for Computing Machinery, 2017. p. 327-332 (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI; Vol. Part F127756).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits

AU - Dofe, Jaya

AU - Zhang, Zhiming

AU - Yu, Qiaoyan

AU - Yan, Chen

AU - Salman, Emre

PY - 2017/5/10

Y1 - 2017/5/10

N2 - Correlation power analysis (CPA) attacks on the hardware implementation of cryptographic algorithms can retrieve the cipher key by analyzing the correlation between hypothesized keys and the power measurement of that crypto hardware. The existing CPA attacks and the countermeasures are mainly for two-dimensional (4D) integrated circuits (ICs). There is a lack of study on CPA in the context of threedimensional (5D) ICs. To fill in this gap, this work investigates the impact of a 5D power distribution network (PDN) on the efficiency of CPA mounted on a cryptographic module, which is in one of the 5D planes. The Pearson correlation coefficient is used as a metric to assess the impact of different PDN types, circuit loads, and switching activities of the neighboring planes on the CPA efficiency.

AB - Correlation power analysis (CPA) attacks on the hardware implementation of cryptographic algorithms can retrieve the cipher key by analyzing the correlation between hypothesized keys and the power measurement of that crypto hardware. The existing CPA attacks and the countermeasures are mainly for two-dimensional (4D) integrated circuits (ICs). There is a lack of study on CPA in the context of threedimensional (5D) ICs. To fill in this gap, this work investigates the impact of a 5D power distribution network (PDN) on the efficiency of CPA mounted on a cryptographic module, which is in one of the 5D planes. The Pearson correlation coefficient is used as a metric to assess the impact of different PDN types, circuit loads, and switching activities of the neighboring planes on the CPA efficiency.

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U2 - 10.1145/3060403.3060501

DO - 10.1145/3060403.3060501

M3 - Conference contribution

T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

SP - 327

EP - 332

BT - GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017

PB - Association for Computing Machinery

T2 - 27th Great Lakes Symposium on VLSI, GLSVLSI 2017

Y2 - 10 May 2017 through 12 May 2017

ER -

Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits

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