Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays

R. A. Rao; H. P. Gasquet; R. F. Steimle; G. Rinkenberger; S. Straub; R. Muralidhar; S. G.H. Anderson; J. A. Yater; J. C. Ledezma; J. Hamilton; B. Acred; C. T. Swift; B. Hradsky; J. Peschke; M. Sadd; E. J. Prinz; K. M. Chang; B. E. White

doi:10.1016/j.sse.2005.10.022

Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays

R. A. Rao
, H. P. Gasquet
, R. F. Steimle
, G. Rinkenberger
, S. Straub
, R. Muralidhar
, S. G.H. Anderson
, J. A. Yater
, J. C. Ledezma
, J. Hamilton
, B. Acred
, C. T. Swift
, B. Hradsky
, J. Peschke
, M. Sadd
, E. J. Prinz
, K. M. Chang
, B. E. White

Physics

Binghamton University

Freescale Semiconductor

Research output: Contribution to journal › Article › peer-review

26 Scopus citations

Abstract

Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size and density characteristics as well as statistical fluctuations on memory arrays is not well understood. This paper shows that the memory window and high temperature data retention are roughly insensitive over a broad range of nanocrystal characteristics. Further, data from mega-bit arrays shows that nanocrystal coalescence effects are small.

Original language	English
Pages (from-to)	1722-1727
Number of pages	6
Journal	Solid-State Electronics
Volume	49
Issue number	11 SPEC. ISS.
DOIs	https://doi.org/10.1016/j.sse.2005.10.022
State	Published - Nov 2005

Keywords

Memory
Nanocrystal
Size effects

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10.1016/j.sse.2005.10.022

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Rao, R. A., Gasquet, H. P., Steimle, R. F., Rinkenberger, G., Straub, S., Muralidhar, R., Anderson, S. G. H., Yater, J. A., Ledezma, J. C., Hamilton, J., Acred, B., Swift, C. T., Hradsky, B., Peschke, J., Sadd, M., Prinz, E. J., Chang, K. M., & White, B. E. (2005). Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays. Solid-State Electronics, 49(11 SPEC. ISS.), 1722-1727. https://doi.org/10.1016/j.sse.2005.10.022

@article{673323d369fc455799d50d9075f9eeee,

title = "Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays",

abstract = "Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size and density characteristics as well as statistical fluctuations on memory arrays is not well understood. This paper shows that the memory window and high temperature data retention are roughly insensitive over a broad range of nanocrystal characteristics. Further, data from mega-bit arrays shows that nanocrystal coalescence effects are small.",

keywords = "Memory, Nanocrystal, Size effects",

author = "Rao, \{R. A.\} and Gasquet, \{H. P.\} and Steimle, \{R. F.\} and G. Rinkenberger and S. Straub and R. Muralidhar and Anderson, \{S. G.H.\} and Yater, \{J. A.\} and Ledezma, \{J. C.\} and J. Hamilton and B. Acred and Swift, \{C. T.\} and B. Hradsky and J. Peschke and M. Sadd and Prinz, \{E. J.\} and Chang, \{K. M.\} and White, \{B. E.\}",

year = "2005",

month = nov,

doi = "10.1016/j.sse.2005.10.022",

language = "English",

volume = "49",

pages = "1722--1727",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Elsevier Ltd.",

number = "11 SPEC. ISS.",

}

Rao, RA, Gasquet, HP, Steimle, RF, Rinkenberger, G, Straub, S, Muralidhar, R, Anderson, SGH, Yater, JA, Ledezma, JC, Hamilton, J, Acred, B, Swift, CT, Hradsky, B, Peschke, J, Sadd, M, Prinz, EJ, Chang, KM & White, BE 2005, 'Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays', Solid-State Electronics, vol. 49, no. 11 SPEC. ISS., pp. 1722-1727. https://doi.org/10.1016/j.sse.2005.10.022

TY - JOUR

T1 - Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays

AU - Rao, R. A.

AU - Gasquet, H. P.

AU - Steimle, R. F.

AU - Rinkenberger, G.

AU - Straub, S.

AU - Muralidhar, R.

AU - Anderson, S. G.H.

AU - Yater, J. A.

AU - Ledezma, J. C.

AU - Hamilton, J.

AU - Acred, B.

AU - Swift, C. T.

AU - Hradsky, B.

AU - Peschke, J.

AU - Sadd, M.

AU - Prinz, E. J.

AU - Chang, K. M.

AU - White, B. E.

PY - 2005/11

Y1 - 2005/11

N2 - Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size and density characteristics as well as statistical fluctuations on memory arrays is not well understood. This paper shows that the memory window and high temperature data retention are roughly insensitive over a broad range of nanocrystal characteristics. Further, data from mega-bit arrays shows that nanocrystal coalescence effects are small.

AB - Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size and density characteristics as well as statistical fluctuations on memory arrays is not well understood. This paper shows that the memory window and high temperature data retention are roughly insensitive over a broad range of nanocrystal characteristics. Further, data from mega-bit arrays shows that nanocrystal coalescence effects are small.

KW - Memory

KW - Nanocrystal

KW - Size effects

UR - https://www.scopus.com/pages/publications/28044463366

U2 - 10.1016/j.sse.2005.10.022

DO - 10.1016/j.sse.2005.10.022

M3 - Article

SN - 0038-1101

VL - 49

SP - 1722

EP - 1727

JO - Solid-State Electronics

JF - Solid-State Electronics

IS - 11 SPEC. ISS.

ER -

Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays

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Keywords

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