Integration challenges of new materials and device architectures for IC applications

Bich Yen Nguyen; Aaron Thean; Ted White; Anne Vandooren; Mariam Sadaka; Leo Mathew; Alexander Barr; Shawn Thomas; Melissa Zalava; Da Zhang; Debby Eades; Zhong Hai Shi; Jamie Schaeffer; Dina Triyoso; Sri Samavedam; Victor Vartanian; Tab Stephen; Brian Goolsby; Stefan Zollner; Ran Liu; Ross Noble; Thien Nguyen; Veer Dhandapani; Bruce Xie; Xang Dong Wang; Jack Jiang; Raghaw Rai; Micheal Sadd; Micheal Ramon; Sriram Kalpat; Lata Prabhu; Vidya Kaushik; Yang Du; Thuy Dao; Michael Mendicino; Marius Orlowski; Phil Tobin; Joe Mogab; Suresh Venkatesan

Integration challenges of new materials and device architectures for IC applications

Bich Yen Nguyen
, Aaron Thean
, Ted White
, Anne Vandooren
, Mariam Sadaka
, Leo Mathew
, Alexander Barr
, Shawn Thomas
, Melissa Zalava
, Da Zhang
, Debby Eades
, Zhong Hai Shi
, Jamie Schaeffer
, Dina Triyoso
, Sri Samavedam
, Victor Vartanian
, Tab Stephen
, Brian Goolsby
, Stefan Zollner
, Ran Liu

Ross Noble, Thien Nguyen, Veer Dhandapani, Bruce Xie, Xang Dong Wang, Jack Jiang, Raghaw Rai, Micheal Sadd, Micheal Ramon, Sriram Kalpat, Lata Prabhu, Vidya Kaushik, Yang Du, Thuy Dao, Michael Mendicino, Marius Orlowski, Phil Tobin, Joe Mogab, Suresh Venkatesan

NY Creates Research Foundation

NY Creates

Freescale Semiconductor

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

New materials and device architectures were integrated into CMOS devices to maintain the historic CMOS performance trend. The materials were like strained Si, SiGe, high-k gate dielectrics, metal gates, ultra thin body SOI (FDSOI) and multi-gated devices. It was found that high-k gate dielectrics enhanced CMOS devices by scaling the effective oxide thickness (EOT) of gate dielectrics to below 1nm with significantly reduction of gate leakage currents. The results show that the minimization of parasitic resistances determined the performance level achieved with CMOS devices.

Original language	English
Title of host publication	2004 International Conference on Integrated Circuit Design and Technology, ICICDT
Pages	237-243
Number of pages	7
State	Published - 2004
Event	2004 International Conference on Integrated Circuit Design and Technology, ICICDT - Austin, TX, United States Duration: May 17 2004 → May 20 2004

Publication series

Name	2004 International Conference on Integrated Circuit Design and Technology, ICICDT

Conference

Conference	2004 International Conference on Integrated Circuit Design and Technology, ICICDT
Country/Territory	United States
City	Austin, TX
Period	05/17/04 → 05/20/04

Cite this

Nguyen, B. Y., Thean, A., White, T., Vandooren, A., Sadaka, M., Mathew, L., Barr, A., Thomas, S., Zalava, M., Zhang, D., Eades, D., Shi, Z. H., Schaeffer, J., Triyoso, D., Samavedam, S., Vartanian, V., Stephen, T., Goolsby, B., Zollner, S., ... Venkatesan, S. (2004). Integration challenges of new materials and device architectures for IC applications. In 2004 International Conference on Integrated Circuit Design and Technology, ICICDT (pp. 237-243). (2004 International Conference on Integrated Circuit Design and Technology, ICICDT).

@inproceedings{62c0590d0e7b466bb6d65264fa5a734d,

title = "Integration challenges of new materials and device architectures for IC applications",

abstract = "New materials and device architectures were integrated into CMOS devices to maintain the historic CMOS performance trend. The materials were like strained Si, SiGe, high-k gate dielectrics, metal gates, ultra thin body SOI (FDSOI) and multi-gated devices. It was found that high-k gate dielectrics enhanced CMOS devices by scaling the effective oxide thickness (EOT) of gate dielectrics to below 1nm with significantly reduction of gate leakage currents. The results show that the minimization of parasitic resistances determined the performance level achieved with CMOS devices.",

author = "Nguyen, \{Bich Yen\} and Aaron Thean and Ted White and Anne Vandooren and Mariam Sadaka and Leo Mathew and Alexander Barr and Shawn Thomas and Melissa Zalava and Da Zhang and Debby Eades and Shi, \{Zhong Hai\} and Jamie Schaeffer and Dina Triyoso and Sri Samavedam and Victor Vartanian and Tab Stephen and Brian Goolsby and Stefan Zollner and Ran Liu and Ross Noble and Thien Nguyen and Veer Dhandapani and Bruce Xie and Wang, \{Xang Dong\} and Jack Jiang and Raghaw Rai and Micheal Sadd and Micheal Ramon and Sriram Kalpat and Lata Prabhu and Vidya Kaushik and Yang Du and Thuy Dao and Michael Mendicino and Marius Orlowski and Phil Tobin and Joe Mogab and Suresh Venkatesan",

year = "2004",

language = "English",

isbn = "0780385284",

series = "2004 International Conference on Integrated Circuit Design and Technology, ICICDT",

pages = "237--243",

booktitle = "2004 International Conference on Integrated Circuit Design and Technology, ICICDT",

note = "2004 International Conference on Integrated Circuit Design and Technology, ICICDT ; Conference date: 17-05-2004 Through 20-05-2004",

}

Nguyen, BY, Thean, A, White, T, Vandooren, A, Sadaka, M, Mathew, L, Barr, A, Thomas, S, Zalava, M, Zhang, D, Eades, D, Shi, ZH, Schaeffer, J, Triyoso, D, Samavedam, S, Vartanian, V, Stephen, T, Goolsby, B, Zollner, S, Liu, R, Noble, R, Nguyen, T, Dhandapani, V, Xie, B, Wang, XD, Jiang, J, Rai, R, Sadd, M, Ramon, M, Kalpat, S, Prabhu, L, Kaushik, V, Du, Y, Dao, T, Mendicino, M, Orlowski, M, Tobin, P, Mogab, J & Venkatesan, S 2004, Integration challenges of new materials and device architectures for IC applications. in 2004 International Conference on Integrated Circuit Design and Technology, ICICDT. 2004 International Conference on Integrated Circuit Design and Technology, ICICDT, pp. 237-243, 2004 International Conference on Integrated Circuit Design and Technology, ICICDT, Austin, TX, United States, 05/17/04.

Integration challenges of new materials and device architectures for IC applications. / Nguyen, Bich Yen; Thean, Aaron; White, Ted et al.
2004 International Conference on Integrated Circuit Design and Technology, ICICDT. 2004. p. 237-243 (2004 International Conference on Integrated Circuit Design and Technology, ICICDT).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Integration challenges of new materials and device architectures for IC applications

AU - Nguyen, Bich Yen

AU - Thean, Aaron

AU - White, Ted

AU - Vandooren, Anne

AU - Sadaka, Mariam

AU - Mathew, Leo

AU - Barr, Alexander

AU - Thomas, Shawn

AU - Zalava, Melissa

AU - Zhang, Da

AU - Eades, Debby

AU - Shi, Zhong Hai

AU - Schaeffer, Jamie

AU - Triyoso, Dina

AU - Samavedam, Sri

AU - Vartanian, Victor

AU - Stephen, Tab

AU - Goolsby, Brian

AU - Zollner, Stefan

AU - Liu, Ran

AU - Noble, Ross

AU - Nguyen, Thien

AU - Dhandapani, Veer

AU - Xie, Bruce

AU - Wang, Xang Dong

AU - Jiang, Jack

AU - Rai, Raghaw

AU - Sadd, Micheal

AU - Ramon, Micheal

AU - Kalpat, Sriram

AU - Prabhu, Lata

AU - Kaushik, Vidya

AU - Du, Yang

AU - Dao, Thuy

AU - Mendicino, Michael

AU - Orlowski, Marius

AU - Tobin, Phil

AU - Mogab, Joe

AU - Venkatesan, Suresh

PY - 2004

Y1 - 2004

N2 - New materials and device architectures were integrated into CMOS devices to maintain the historic CMOS performance trend. The materials were like strained Si, SiGe, high-k gate dielectrics, metal gates, ultra thin body SOI (FDSOI) and multi-gated devices. It was found that high-k gate dielectrics enhanced CMOS devices by scaling the effective oxide thickness (EOT) of gate dielectrics to below 1nm with significantly reduction of gate leakage currents. The results show that the minimization of parasitic resistances determined the performance level achieved with CMOS devices.

AB - New materials and device architectures were integrated into CMOS devices to maintain the historic CMOS performance trend. The materials were like strained Si, SiGe, high-k gate dielectrics, metal gates, ultra thin body SOI (FDSOI) and multi-gated devices. It was found that high-k gate dielectrics enhanced CMOS devices by scaling the effective oxide thickness (EOT) of gate dielectrics to below 1nm with significantly reduction of gate leakage currents. The results show that the minimization of parasitic resistances determined the performance level achieved with CMOS devices.

UR - https://www.scopus.com/pages/publications/4143148627

M3 - Conference contribution

SN - 0780385284

T3 - 2004 International Conference on Integrated Circuit Design and Technology, ICICDT

SP - 237

EP - 243

BT - 2004 International Conference on Integrated Circuit Design and Technology, ICICDT

T2 - 2004 International Conference on Integrated Circuit Design and Technology, ICICDT

Y2 - 17 May 2004 through 20 May 2004

ER -

Integration challenges of new materials and device architectures for IC applications

Abstract

Publication series

Conference

Other files and links

Fingerprint

Cite this