Multichip SiC Power Module Packaging Using Direct Ink Writing

The demand for compact, customized power devices is growing, driven by advancements in electric transportation and renewable energy. Wide bandgap (WBG) semiconductors, such as silicon carbide (SiC), offer superior performance over traditional silicon (Si) due to their higher switching frequencies, improved efficiency, and greater voltage capabilities. However, conventional packaging methods often limit WBG adoption due to high costs and complexity. Additive manufacturing (AM) presents a promising alternative, enabling streamlined production, design flexibility, and reduced material waste. Leveraging AM processes and materials, significant improvements in size, weight, power density, and functionality can be realized. In this study, we demonstrated the first 1.7 kV low-profile, low-inductance multichip SiC module using direct ink writing. Finite element analysis of electrical stress defined the material requirements and design geometry, which facilitates the selection of candidate materials and processing techniques. Comprehensive testing of printed insulator and conductor materials validated their compatibility with SiC packaging requirements. Key SiC MOSFET parameters, such as on-resistance, leakage current, and threshold voltage, remained consistent with those of conventionally packaged modules and bare die performance, indicating minimal impact from AM processes. The printed modules passed a 4 kV AC isolation test, exhibited discharge-free operation up to 1.7 kV, withstood a double pulse test at 800 V / 105 A with inductance of 23.83 nH, and completed 50,000 power cycling cycles at 50 A without failure. Despite these achievements, high stress power cycling, thermal cycling and humidity bias tests revealed limitations in the current AM materials and processes, highlighting important areas for future improvement toward long-term reliability.