Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO 2) gate dielectric

A. V.Y. Thean; A. Vandooren; S. Kalpat; Y. Du; I. To; J. Hughes; T. Stephens; B. Goolsby; T. White; A. Barr; L. Mathew; M. Huang; S. Egley; M. Zavala; D. Eades; K. Sphabmixay; J. Schaeffer; D. Triyoso; M. Rossow; D. Roan; D. Pham; R. Rai; S. Murphy; B. Y. Nguyen; B. E. White; A. Duvallet; T. Dao; J. Mogab

Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO ₂) gate dielectric

A. V.Y. Thean
, A. Vandooren
, S. Kalpat
, Y. Du
, I. To
, J. Hughes
, T. Stephens
, B. Goolsby
, T. White
, A. Barr
, L. Mathew
, M. Huang
, S. Egley
, M. Zavala
, D. Eades
, K. Sphabmixay
, J. Schaeffer
, D. Triyoso
, M. Rossow
, D. Roan

D. Pham, R. Rai, S. Murphy, B. Y. Nguyen, B. E. White, A. Duvallet, T. Dao, J. Mogab

Physics

Binghamton University

Research output: Contribution to journal › Conference article › peer-review

10 Scopus citations

Abstract

In this paper, we report the performance and reliability of sub-100nm TaSiN metal gate fully depleted SOI devices with high-k gate dielectric. Performance differences between fully-depleted and partially-depleted devices are highlighted. This is also the first time that an unique asymmetric degradation phenomenon between electron and hole mobility in metal/high-k devices is reported. Despite the use of high-k dielectric, we show that these devices exhibit superior reliability, noise and analog circuit performances.

Original language	English
Pages (from-to)	106-107
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
State	Published - 2004
Event	2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States Duration: Jun 15 2004 → Jun 17 2004

Cite this

Thean, A. V. Y., Vandooren, A., Kalpat, S., Du, Y., To, I., Hughes, J., Stephens, T., Goolsby, B., White, T., Barr, A., Mathew, L., Huang, M., Egley, S., Zavala, M., Eades, D., Sphabmixay, K., Schaeffer, J., Triyoso, D., Rossow, M., ... Mogab, J. (2004). Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO ₂) gate dielectric. Digest of Technical Papers - Symposium on VLSI Technology, 106-107.

@article{67c27e919674430eba89360dc4898aba,

title = "Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO 2) gate dielectric",

abstract = "In this paper, we report the performance and reliability of sub-100nm TaSiN metal gate fully depleted SOI devices with high-k gate dielectric. Performance differences between fully-depleted and partially-depleted devices are highlighted. This is also the first time that an unique asymmetric degradation phenomenon between electron and hole mobility in metal/high-k devices is reported. Despite the use of high-k dielectric, we show that these devices exhibit superior reliability, noise and analog circuit performances.",

author = "Thean, \{A. V.Y.\} and A. Vandooren and S. Kalpat and Y. Du and I. To and J. Hughes and T. Stephens and B. Goolsby and T. White and A. Barr and L. Mathew and M. Huang and S. Egley and M. Zavala and D. Eades and K. Sphabmixay and J. Schaeffer and D. Triyoso and M. Rossow and D. Roan and D. Pham and R. Rai and S. Murphy and Nguyen, \{B. Y.\} and White, \{B. E.\} and A. Duvallet and T. Dao and J. Mogab",

year = "2004",

language = "English",

pages = "106--107",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2004 Symposium on VLSI Technology - Digest of Technical Papers ; Conference date: 15-06-2004 Through 17-06-2004",

}

Thean, AVY, Vandooren, A, Kalpat, S, Du, Y, To, I, Hughes, J, Stephens, T, Goolsby, B, White, T, Barr, A, Mathew, L, Huang, M, Egley, S, Zavala, M, Eades, D, Sphabmixay, K, Schaeffer, J, Triyoso, D, Rossow, M, Roan, D, Pham, D, Rai, R, Murphy, S, Nguyen, BY, White, BE, Duvallet, A, Dao, T & Mogab, J 2004, 'Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO ₂) gate dielectric', Digest of Technical Papers - Symposium on VLSI Technology, pp. 106-107.

TY - JOUR

T1 - Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO 2) gate dielectric

AU - Thean, A. V.Y.

AU - Vandooren, A.

AU - Kalpat, S.

AU - Du, Y.

AU - To, I.

AU - Hughes, J.

AU - Stephens, T.

AU - Goolsby, B.

AU - White, T.

AU - Barr, A.

AU - Mathew, L.

AU - Huang, M.

AU - Egley, S.

AU - Zavala, M.

AU - Eades, D.

AU - Sphabmixay, K.

AU - Schaeffer, J.

AU - Triyoso, D.

AU - Rossow, M.

AU - Roan, D.

AU - Pham, D.

AU - Rai, R.

AU - Murphy, S.

AU - Nguyen, B. Y.

AU - White, B. E.

AU - Duvallet, A.

AU - Dao, T.

AU - Mogab, J.

PY - 2004

Y1 - 2004

N2 - In this paper, we report the performance and reliability of sub-100nm TaSiN metal gate fully depleted SOI devices with high-k gate dielectric. Performance differences between fully-depleted and partially-depleted devices are highlighted. This is also the first time that an unique asymmetric degradation phenomenon between electron and hole mobility in metal/high-k devices is reported. Despite the use of high-k dielectric, we show that these devices exhibit superior reliability, noise and analog circuit performances.

AB - In this paper, we report the performance and reliability of sub-100nm TaSiN metal gate fully depleted SOI devices with high-k gate dielectric. Performance differences between fully-depleted and partially-depleted devices are highlighted. This is also the first time that an unique asymmetric degradation phenomenon between electron and hole mobility in metal/high-k devices is reported. Despite the use of high-k dielectric, we show that these devices exhibit superior reliability, noise and analog circuit performances.

UR - https://www.scopus.com/pages/publications/4544229587

M3 - Conference article

SN - 0743-1562

SP - 106

EP - 107

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

T2 - 2004 Symposium on VLSI Technology - Digest of Technical Papers

Y2 - 15 June 2004 through 17 June 2004

ER -

Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-k (HfO ₂) gate dielectric

Abstract

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