Skip to main navigation Skip to search Skip to main content

Real-Time Cell Viability Measurements Using Lab-on-CMOS-Capacitance Sensor Array

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

We report advances in packaging and testing for existing Complementary Metal Oxide Semiconductor (CMOS) chips that extend their longevity and reusability, thus increasing their effectiveness in monitoring cell viability and facilitating concurrent visual inspection. We created several Printed Circuit Board (PCB) designs aimed at mitigating packaging failures while facilitating data collection using a microcontroller ensuring the creation of a reliable and replaceable cell viability measurement device. Using 3D Modeling software and programming Field Programmable Gate Arrays (FPGA), we developed a rapidly interchangeable test platform and established a data readout system. These advancements notably enhance research efficiency and data quality by minimizing downtime and improving the correlation of capacitance measurements with direct visual observations of cell behavior.

Original languageEnglish
Title of host publication2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1305-1308
Number of pages4
ISBN (Electronic)9798350387179
DOIs
StatePublished - 2024
Event67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024 - Springfield, United States
Duration: Aug 11 2024Aug 14 2024

Publication series

NameMidwest Symposium on Circuits and Systems

Conference

Conference67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024
Country/TerritoryUnited States
CitySpringfield
Period08/11/2408/14/24

Keywords

  • CMOS
  • Cell Viability
  • Data Acquisition
  • LOC
  • Lab-on-CMOS
  • Lab-on-a-chip
  • PCB
  • Packaging
  • Sensor Longevity

Fingerprint

Dive into the research topics of 'Real-Time Cell Viability Measurements Using Lab-on-CMOS-Capacitance Sensor Array'. Together they form a unique fingerprint.

Cite this