Reliability evaluation of high density microvia structures

High Density Interconnect (HDI) technology uses a photoimageable dielectric, a laser ablated dielectric, or a resin coated copper foil with laser, photo or plasma etched via fabrication. The effect of multiple factors on the reliability of microvia structures was evaluated using Liquid-To-Liquid Thermal Shock (LLTS) testing. Each LLTS cycle was comprised of a 5 minute hold at each temperature extreme (-55°C and +125°C) with a transition time of 10 seconds. The via chain's resistance was periodically measured during LLTS testing to identify failures. Two test vehicles were designed to study the effect of factors such as via size, via pad size, dielectric material, via plating thickness, via fabrication technology, via misregistration, blind or buried vias, and layer-to-layer alignment on the reliability of the microvias. Laser and photoablation technologies were used to fabricate the microvias. Non-glass reinforced and glass reinforced dielectric materials were used along with different surface finishes (Ni/Au and CuOSP) from multiple vendors. Cross-sections were used to evaluate the vias and parameters such as wall inclination and plating thickness. In general, the larger vias 203.2 μm (8 mils) had a mean fatigue lifetime higher than the small vias 76.2 μm (3 mils). Failure based on manufacturing defects such as incomplete fiber bundle removal, via misregistration, poor plating thickness, and small dimensions of the pads with respect to the vias were a large segment of the early failures found in testing. Poor plating thickness, via misregistration, and pad and via dimensions resulted in the cracks in via walls, and the via interface corners. Improper plating at the bottom of the via coupled with a high stress concentration resulted in a break at the via pad interface corners. Non-reinforced dielectric materials showed failures in the pad via interface. Uncleaned epoxy and glass fibers in the via hole are significant causes of via failures.