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Segment-Aware Dynamic Partitioning PCM-DRAM: A Solution to IoT Devices Development Constraints

Research output: Contribution to journalArticlepeer-review

Abstract

The Internet of Things (IoT) furnishes a visual blueprint for the future internet. It serves up sensors, actuators, and distal devices on the edge of the network, creating a giant interconnected network. The IoT era refers to the future where all the conceivable data streams are integrated into the IoT, granting human-barrier free access to physical entities on the internet. Along with the rapid progress of IoT, pressing issues have emerged. Energy dissipation, limited processing efficiency, and confined memory have become severe constraints for the IoT era. Phase Change Memory with Dynamic Random-Access Memory (PCM-DRAM) is a hybrid memory system that has been proven to reduce energy dissipation. It is known to have a great capacity, higher endurance, and low latency. In this study, we first analyze the significant constraints faced in the IoT development. We then analyze how these constraints can be solved by PCM-DRAM memory. To this end, we propose a PCM-DRAM hybrid memory system called “Segment-Aware and Dynamic Partitioning PCM-DRAM” (SADP PCM-DRAM). Our proposal is grounded in a meticulous evaluation of the specific requirements posed by IoT applications. Furthermore, we also proposed two essential equations for quantifying energy consumption and the overall performance in terms of average memory hit time.

Original languageEnglish
Pages (from-to)1212-1221
Number of pages10
JournalJournal of Computer Science
Volume19
Issue number10
DOIs
StatePublished - 2023

Keywords

  • Hybrid Architecture
  • IoT
  • Main Memory
  • PCM-DRAM
  • SADP PCM-DRAM

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