@inproceedings{cc0d0b6db97946c4a36c1714e3085ea0,
title = "System Integration of IC chips for Lab-on-CMOS Applications",
abstract = "Integrating CMOS sensor chips to allow for wet experimentation on lab-on-CMOS devices is a challenging task. In this paper we describe a chip packaging method that will allow for simple integration and handling of small integrated circuit (IC) chips. A chip is embedded in an epoxy handle wafer to allow for photolithographic processing. Electrical connections are provided by a sputter-deposited copper layer and an electroplated nickel layer. Passivation was performed using a second epoxy layer. The process was evaluated by packaging a capacitance sensor chip and performing live cell culture experiments with package cleaning and reuse. Results showed good structural reliability in three repeated experiments over five cumulative days, with no adverse effects on the viability of cells.",
keywords = "biosensor chip, cell culture, lab on a chip, packaging, planar metallization",
author = "Sheung Lu and Bathiya Senevirathna and Marc Dandin and Elisabeth Smela and Pamela Abshire",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 ; Conference date: 27-05-2018 Through 30-05-2018",
year = "2018",
month = apr,
day = "26",
doi = "10.1109/ISCAS.2018.8351395",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings",
}