Technology options for post-Cu, on-chip electrical interconnects: Recent developments in metallic nanowire fabrication

Electron scattering in conventional polycrystalline Cu on-chip interconnects currently limits the performance of complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs). These limitations are expected to worsen with continued reduction in the feature size of local and semi-global interconnects, thus threatening to limit the historical rate of improvement of IC performance (so-called Moore's Law). Novel interconnect materials intrinsically exhibiting reduced electron scattering may provide an attractive alternative to Cu and eliminate or slow die negative impact of electron scattering on IC performance. Specifically, materials that exhibit or can be designed to exhibit quasi ID ballistic conduction have attracted substantial attention as a replacement for Cu on-chip interconnects. Here we discuss a potential alternate route for ballistically-conductive nanowires formation through templated assembly of a metallic conduction channel on a silicon-based nanowire.