Thermal development, modeling and characterization of the cell processor module

Optimal package thermal design for today's high power processors is critical to meet demanding performance, cost, and reliability objectives. This paper describes the thermal characterization and development of the first generation CELL processor, developed jointly by Sony, Toshiba and IBM. The package not only provides the very high bandwidth necessary for electrical performance, but also achieves low thermal resistance to dissipate high power and maintain low die temperatures with superior reliability. The focus of the paper will be the first level package. The target thermal resistance for the package will be explained as determined from detailed 2^nd level modeling, and novel power map calculation and validation techniques will be discussed. Thermal and mechanical modeling will be used characterize the effects of the thermal interface material (TIM) on the thermal performance and mechanical response of the package. The thermal test strategy and the TIM characterization techniques will be described. In summary, the paper will describe the novel thermal modeling and characterization methodology used in the design process, allowing high heat flux in a low cost system application.