Abstract
Successive-approximation register (SAR) ADCs are susceptible to non-linearities due to capacitor mismatch. This brief proposes a transition points-based calibration of the SAR ADC using an RC-filtered square wave by looking at the histogram of output digital codes to improve the linearity without any additional analog circuitry. The proposed method is validated with an 8-bit SAR ADC fabricated in UMC 180-nm CMOS. The proposed calibration algorithm improves the signal-to-noise and distortion ratio (SNDR) of the 8-bit ADC from 42.87 dB to 46.91 dB, and the spurious-free dynamic range (SFDR) from 51.95 dB to 60.61 dB.
| Original language | English |
|---|---|
| Pages (from-to) | 1794-1798 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 70 |
| Issue number | 5 |
| DOIs | |
| State | Published - May 1 2023 |
Keywords
- SAR ADC
- calibration
- histogram
- transition points
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